Product display
MCU+logic gate, transistor multi chip encapsulation
After sealing, the SIP module has a small size, high integration, high reliability, high confidentiality, and low energy consumption. To become a customized chip product, customers can invest in the industry through the research and development, sales, and investment of this chip.
Wafer procurement business
One of the pain points of SIP system sealing is the procurement of bare wafers. Xinzhou Integrated Circuit has business dealings with international and domestic chip design companies. Rich procurement channels for chips with different functions
SIP Packaging Simulation Optimization
Electrical simulation analysis:
Including S parameter extraction for packaging, Crosstalk analysis, SSO analysis, eye pattern analysis, capacitor normalization, power supply current distribution and DC voltage reduction analysis, packaging EMC analysis optimization, and DIE-PKG collaborative simulation, etc
SIP packaging production
Covering different processes from wafer testing to AOI testing, we can provide customers with fast sampling and small-scale mass production services.
